Preamble

Development of the CEPC analog hadron calorimeter prototype Yukun Shi, Anshun Zhou, Hao Liu, Jiechen Jiang, Yanyun Duan, Yunlong Zhang, 1, 2, Zhongtao Shen, Jianbei Liu, Boxiang Yu, 6, 3, 7 Shu Li, Haijun Yang, Yong Liu, Liang 3, 10 Zhen Wang, Siyuan Song, Dejing Du, Jiaxuan Wang, Junsong Zhang, and Quan Ji 1 State Key Laboratory of Particle Detection and Electronics, University of Science and Technology of China, Hefei 230026, China University of Science and Technology of China, Department of Modern Physics, Hefei 230026, China Institute of High Energy Physics, Chinese Academy of Sciences (CAS), 100049, Beijing, China Tsung-Dao Lee Institute, Shanghai Jiao Tong University, Shanghai, 201210, China Key Laboratory for Particle Physics,Astrophysics and Cosmology (Ministry of Education), Shanghai Key Laboratory for Particle Physics and Cosmology,Shanghai 200240,China State Key Laboratory of Particle Detection and Electronics, Institute of High Energy Physics, 100049, Beijing, China School of Physical Science, University of Chinese Academy of Sciences, 100049, Beijing, China Tsung-Dao Lee Institute & School of Physics and Astronomy, Shanghai Jiao Tong University, Shanghai 201210, China School of Physics and Astronomy & Tsung-Dao Lee Institute, Shanghai Jiao Tong University, Shanghai 200240, China Department of Nuclear Technology and Application, China Institute of Atomic Energy,102413,Beijing,China The Circular Electron Positron Collider (CEPC) is a next-generation electron–positron collider proposed for the precise measurement of the properties of the Higgs boson. To emphasize boson separation and jet reconstruction, the baseline design of the CEPC detector was guided by the particle flow algorithm (PFA) concept. As one of the calorimeter options, the analogue hadron calorimeter (AHCAL) was proposed. The CEPC AHCAL comprises a 40-layer sandwich structure using steel plates as absorbers and scintillator tiles coupled with silicon photomultipliers (SiPM) as sensitive units.

To validate the feasibility of the AHCAL option, a series of studies were conducted to develop a prototype. This AHCAL prototype underwent an electronic test and a cosmic ray test to assess its performance and ensure it was ready for three beam tests performed in 2022 and 2023. The test beam data is currently under analysis, and the results are expected to deepen our understanding of hadron showers, validate the concept of Particle Flow Algorithm (PFA), and ultimately refine the design of the CEPC detector.

Keywords

Hadronic Calorimeter, Scintillator Calorimeter, SiPM, particle flow algorithm, CEPC

INTRODUCTION

The discovery of the Higgs boson marked a significant 2

milestone in the field of particle physics [ ]. Now, the focus is on precisely measuring the properties of the Higgs boson[ ], which has led to the proposal of the Circu- lar Electron-Positron Collider (CEPC) as a future Higgs factory[ ]. The CEPC could operate at a center-of-mass en-

240 GeV

with a luminosity of resulting in an integrated luminosity of for two interaction points over a decade, producing 4 million Higgs bosons[ ]. In addition, it will also be operated on the pole as a factory, perform a precise threshold scan, and be upgraded to a center-of-mass energy of

360 GeV

close to the threshold. The CEPC physics potential has been continuously ex- plored by the CEPC Physics study groups, focusing on a wide

Supported by National Key Program for S&T Research and Develop- ment (2018YFA0404303), the National Natural Science Foundation of China(12125505,11961141006) and Shanghai Pilot Program for Basic Re- search—Shanghai Jiao Tong University(21TQ1400209).

range of topics, including Higgs precision measurements, precise EW measurements, Flavor Physics, and so on. Many Higgs boson couplings can be measured with precision about

one order of magnitude better than those achievable at the 20

High Luminosity LHC (HL-LHC)[ ]. In addition, the CEPC is expected to improve the current precision of many

of the electroweak observables by about one order of magni- 23

tude or more[ These CEPC physics studies also identified a handful of critical detector requirements.

A boson mass resolu- tion(BMR) of 4% is required to separate the Higgs bosons

from the W and Z bosons in their hadronic decays, corre- 28

sponding to an unprecedented jet energy resolution of 3-4% at

100 GeV

].To achieve this jet energy resolution, the base- line detector concept was guided by the particle flow algo- rithm (PFA) of measuring final state particles in the most suited detector subsystem[ ]. It employs an ultra-high granular calorimetry system to efficiently separate the final state particle showers, a low material tracking system to min- imize the interaction of the final state particles in the tracking material, and a large volume 3 Tesla solenoid that encloses the entire calorimetry system as illustrated in Fig.

The calorimetry system plays a crucial role in the PFA for separating different particles in a jet and measuring the

photons and neutral hadrons. The analog hadron calorime- ter(AHCAL) with ultra-high granularity was proposed as one of the options for the CEPC calorimetry. The AHCAL utiliz- ing the SiPM-on-tile technology was previously developed by the CALICE group for the future linear collider, and a proto- type was exposed to test beams in 2018[ ]. However, considering that the CEPC will operate at a relatively low center-of-mass energy to prioritize precise Higgs measure- ments, it is essential to optimize the design of the AHCAL and build a prototype to validate its performance.

This article describes the design, construction, and tests of the CEPC AHCAL prototype that consists of a 40 layer steel- scintillator sandwich structure. The design of the AHCAL

prototype including the sensitive units, the readout electron- 54

ics and the mechanical structure are introduced in Section 2. 55

Section 3 discusses the construction of the AHCAL proto- type, covering the production and testing of scintillator tiles, SiPM testing, sensitive layer production, and prototype inte-

gration. In Section 4, the electronic test and the cosmic ray 59

test are presented, demonstrating the functionality of the pro- totype. Finally, Section 5 provides a summary.

DESIGN OF THE AHCAL PROTOTYPE The design of the CEPC AHCAL was optimized based on the PFA reconstruction results of the channel within the CEPC software environment[ The optimized AH- CAL design could achieve a Higgs boson mass resolution of 3.7%[ ]. Following the optimized AHCAL design, the AH- CAL prototype was expected to exhibit an energy linearity of approximately 1.5% and an energy resolution of approx- imately (GeV) for pion particles with an energy ranging

80 GeV

.The prototype consists of 40 sam- pling layers, with each layer composed of 20 mm steel as the absorber and plastic scintillator tiles as the sensitive material, as illustrated in Fig. . The total material of the prototype amounts to approximately . The sensitive area of the prototype is 720 mm , corresponding to 12960 scintillator tiles. These Scintillator tiles are read out by the silicon photomultiplier (SiPM) and SPIROC2E chips.

The scintillator tiles and electronics are housed in steel cas- 79

settes forming sensitive layers, which are then secured by the supporting framework along with the absorber plates.

A. Sensitive unit 82

The scintillator is often used as the sensitive material for sampling calorimetry, along with the novel photosensitive de-

vice SiPM[ 24 – 32 ]. The AHCAL sensitive unit is composed 85

of a scintillator tile and a SiPM. The scin- tillator tile is designed with a groove at the bottom to accommodate the SiPM[ ], as depicted in . Moreover, an LED is also positioned in the groove adjacent to the SiPM for calibration[ The scintillator tiles were produced using a cost-effective

injection molding technique, with the recipes and pro- 92

cedures undergoing eight iterations to achieve optimal performance[ Subsequently, the scintillator tile was wrapped with ESR, as shown in Fig.

The scintillator tile was tested by a Sr-90 source and a S14160-1315P SiPM[ The result was shown in , indicating that the light yield of this scintillator tile was approximately 17 p.e. (photon-electron). The non-

uniformity of the scintillator tile was obtained by varying the 100

position of the Sr-90 source. It turned out to be approximately 6.7%[ A simulation based on GEANT4 was carried out to inves- tigate the impact of the SiPM on the performance of the AH- CAL. A standalone AHCAL prototype geometry was built, and its responses to hadrons of different energies were simu- lated.

Various thresholds in the unit of MIP(Minimum Ionizing 108

Particle) were applied in the simulation. The energy reso- lution improves while lower threshold is utilized, indicating that the SiPM with low crosstalk or high light yield should be selected for the prototype.

The energy deposition in a single AHCAL scintillator tile

100 GeV

hadrons was also simulated[ ]. The majority of scintillator tiles exhibit energy depositions below 400 MIP, indicating that the dynamic range of the SiPM, estimated as the pixel number divided by the light yield, should exceed To address the requirements of the CEPC AHCAL, several

sensitive units of different SiPMs were evaluated[ 36 , 37 ].

As 120

Number of events Output(ADC) a result, two types of SiPMs were selected for the AHCAL prototype, with their parameters listed in table . Note that the EQR-22-1313D-S model has four pads, but only two of them were read out. the S14160-1315P SiPM was implemented on 38 AHCAL sensitive layers due to its low crosstalk and high dynamic-range. The EQR-22-1313D-S SiPM was utilized on the last 2 layers of the AHCAL prototype due to its high light yield and low price[

B. Readout electronics system 129

The readout electronic system is responsible for collecting 130

data from 12,960 channels across the 40 sensitive layers. It is

composed of the front-end electronics and the DAQ system. 132

The front-end electronics consists of 120 HBU boards and 133

the DAQ system consists of 40 Data InterFace(DIF) boards CAL prototype

SiPM HPK S14160-1315PS NDL EQR15-22-1313D-S Sensitive area( mm 2 ) 1 . 3 × 1 . 3 4 × 1 . 3 × 1 . 3 Number of pixels 7248 7396 × 4 Break down voltage( V ) 38 27.5 Dark count rate( kHz ) 200 400 Photon detection efficiency(PDE)(%) 32 45 Gain( 10 5 ) 1.93 4.0 Cross talk(%) < 1 4.4 light yield(p.e.) 17 40(2 pads)

and a DAQ board, as shown in Fig. . The HBU board is

responsible for carrying the sensitive units and converting the 136

analog signals of the sensitive units into digital signals, the 137

DIF board is designed to collect the digital signals across the sensitive layer, and the DAQ board is intended to gather the data from the DIF boards and transmit it to the server.

On one side of the HBU, 108 SiPMs were soldered with LEDs positioned beside them, and the scintillator tiles were subsequently affixed using glue, as depicted in Fig. the opposite side of the HBU, three SPIROC2E chips were

employed for the data collection of these 108 sensitive units, 145

SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from for each is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embed- ded to digitize the analog memory contents (time and charge on 2 gains). The data are then stored in a 4 kbytes A very complex digital part has been integrated to manage all theses features and to transfer the data to the DAQ. Each SPIROC chip contains 36 channels, corresponding to 36 sen-

sitive units. Each SPIROC channel employs two preampli- 158

fiers with different gains to enhance the dynamic range, as depicted in Fig. . Following the high gain preamplifier, a fast shaper and a discriminator are used to provide self- trigger. Once triggered, the signals from the high gain pream- plifier and the low gain preamplifier are recorded in the ana- log memory after the slow shaping. Subsequently, the signals stored in the analog memory are converted into digital sig- nals by a 12-bit ADC. It is important to note that the signal that triggers the SPIROC chip may not be exactly the same as the signal recorded. For instance, if a signal with an ex- tremely narrow time width triggers the discriminator after the fast shaper, a pedestal may be recorded after the slow shaper.

A single sensitive layer of AHCAL contains 3 HBUs, cor-

responding to 324 sensitive units. A DIF board was de- 172

signed to collect signals from these HBUs with a parallel readout scheme, as illustrated in Fig. . 18 small FIFO (First In/First Out) modules and one large FIFO module were designed to cache the data from 9 SPIROC2E chips, en- abling the simultaneous processing of the Analog to Digi- tal (AD) conversion and the data transmission.

This par-

allel readout scheme significantly enhanced the event read- 179

DIF board(bottom right). (b) The sensitive unit on HBU. (c) The SPIROC2E chip on HBU.

out rate to 3 kHz , comparing to the

83 Hz

of serial readout scheme, enabling the prototype to operate under the beam- line environment[ The FPGA on the DIF board also processes commands from upstream, real-time control of the HBU board, and power supply to the HBU boards.

A DAQ system was designed to collect the data from 40 DATASHEET

4 Spiroc Analog Part

The analogue core is composed of 36 channels embedding an input DAC for SiPM high voltage adjustment on 5V to tune gain channel by channel. Two preamplifiers allow the requested dynamic range and are followed by a trigger line made of a fast shaper and a discriminator. The charge measurement line is made of two variable slow shapers and two 16-depth SCAs. The block scheme of a channel is shown on the next figure. 0.1pF-1.5pF 1.5pF Slow Shaper Analog memory 50 -100ns Low gain Preamplifier selection Depth 16 Slow Shaper 0.1pF-1.5pF 12-bit Wilkinson Charge measurement 50-100ns Depth 16 Fast Shaper High gain Preamplifier Conversion 80 µs Variable delay Discri Trigger Depth 16 DAC output Analog output measurement 10-bit DAC Common to the 36 channels ]. (b) Parallel readout scheme of 9 SPIROC2E chips in a single AHCAL layer[ ]. (c) Schematic view of the readout and data acquisition, involving 40 DIF boards and a DAQ board.

DIF boards and transmit the data to the server or the PC. Ad-

ditionally, it synchronizes the clocks across the 40 AHCAL 187

layers, and dispatches triggers and other commands to the DIF boards. Fig. provides a schematic view illustrat-

ing the interactions between the front-end electronics and the 190

DAQ system. The trigger system of the AHCAL consists of the

SPIROC2E chips, the DAQ board and the trigger logic unit 193

(TLU)[ ]. The TLU distributes the trigger based on the co- incidence measurement, which is determined by signals from other detectors or two specific layers of the AHCAL proto- type. Once receives the trigger from the TLU, the DAQ sends a readout command to all SPIROC2E chips via DIF boards.

The SPIROC2E chips start the AD conversion and the FIFO cache starts to readout. If the absence of the trigger is over , the DAQ board sends an erase command to clear the cache.

Calibration system

The non-uniformities among the numerous AHCAL chan- 204

nels would significantly impact the performance of the AH- 205

CAL. Therefore, a calibration system was developed. The SPIROC chips were modified to calibrate the pedestal and gain of each channel.

SiPMs were coupled with LEDs

for gain monitoring. Additionally, each sensitive layer was 209

equipped with 48 temperature sensors to monitor temperature 210

variations. The pedestal of each channel could be obtained by a ran- dom trigger distributed from the DIF board to SPIROC chips.

The pedestal of this channel is determined as the mean value derived from the Gaussian fitting, as illustrated in Fig.

The DIF board could also inject electric charge into the SPIROC chip to probe the response of all channels. varying the amount of injection charge, the gain ratio be- tween high gain and low gain could be calibrated, as show in . The high gain response is linear with the low gain response till it reaches its saturation point. With the linear part and the saturation part fitted separately, gain ratio could be obtained from the slope of the left line, and the saturation point is considered to be the intersection of two lines.

The LED placed adjacent to the SiPM is used to cali-

brate and monitor the SiPM. On a single HBU, 108 LEDs 226

are divided into two groups to prevent light crosstalk. The SiPM response to the LED exhibits good single photon sepa- ration as illustrated in Fig. . The intervals between photon peaks are approximately

20 ADC

, representing the gain of the SiPM. The performances of SiPMs such as gain, PDE, and cross talk were notably influenced by temperature. Therefore, a

temperature monitoring system consisting of 48 temperature 234

sensors on each sensitive layer was implemented.

D. Mechanical structure 236

The mechanical structure of the AHCAL prototype is com- 237

posed of the steel cassettes and the supporting framework.

The steel cassette was designed to accommodate three HBUs and one DIF board. The supporting framework is responsible for securing the steel cassettes and absorber plates.

The design of the AHCAL prototype supporting frame- work is depicted in Fig. . This framework supports and secures 40 absorber plates measuring 16 mm , with steel cas-

settes accommodating the scintillator tiles and electronics in- 245

serted into the gaps between these plates. The total thickness of the absorbing material is 800 mm , which includes contri- butions from the steel cassettes.

The design of the steel cassettes pursuits of the compact- ness of the AHCAL prototype, As illustrated in Fig. . The Number of Events Highgain output(ADC) Number of Events Highgain(ADC) Lowgain(ADC) Number of Events Output(ADC) AHCAL channel, fitted by 2 linear function. (c) LED spectrum of a single AHCAL channel, each peak corresponds to a photoelectron. top and bottom steel sheets of the cassettes, which serve as part of the absorbing material, are both thick. This thickness ensures the stiffness of the cassette while main-

taining portability. The scintillator tile, wrapped with ESR, 254

has a thickness of , while the PCB has a thickness . Additionally, a space is designed for the

electronic parts, providing a tolerance of 1 mm . The total 257

thickness of the cassette is 14 mm HBUs and the DIF board. The scintillator tiles are in direct touch with the bottom sheet, and six steel strips with a thick- ness of are fixed to the bottom sheet secure the scin- tillator tiles and provide screw holes for HBU fixation. This design provides light shielding to the scintillator tiles while

maintaining the compactness as much as possible. The HBUs 265

will be attached to the top sheet with six small strips, leaving

HBUs and the DIF board. space for air cooling. CONSTRUCTION OF THE AHCAL PROTOTYPE In the construction process of the AHCAL prototype, a to- tal of 16000 scintillator tiles were produced and tested, along with 120 HBU boards that were manufactured and soldered with SiPMs. They were assembled into 40 sensitive layers with other components.

Furthermore, 40 DIF boards, the DAQ board, 40 absorber plates, and the supporting frame- work were fabricated. After the integration of all these com- ponents, the AHCAL prototype was completed.

A. Production of sensitive units 277

The scintillator tiles were produced efficiently with the in-

jection molding technique and wrapped with ESR foils using 279

a dedicated machine. A light yield test platform was devel- oped to test this vast quantity of scintillator tiles[ ]. The platform consists of a front-end board, a DIF board, a Sr-90 source loaded on a 3D servo motor, and a PC, as demonstrated in Fig. . The front-end board followed the design of HBU, utilizing 144 S13360-1325PE SiPMs and 4 SPIROC2E chips, allowing for the testing of 144 scintillator tiles in a single run. (a) The test platform for scintillator tiles. (b) The MIP spectrum of a single scintillator tile, each peak corresponds to a photoelectron[ ]. (c) Light yield distribution of all 15524 scintilla- tor tiles tile. The peaks corresponding to photon electrons were iden-

tified, and the ADC value of a single photon-electron was es- timated. The light yield of the scintillator tile was determined by the most probable value (MPV) obtained from fitting a convolution of the Landau and Gaussian functions.

all the scintillator tiles. To improve the uniformity of the AH- 294

CAL prototype, only scintillator tiles with a light yield falling within a window of p.e. were selected. Out of ap- proximately 16000 scintillator tiles, 14219 were chosen under this criterion[ A SiPM test platform was developed based on customized jigs and LEDs. The customized jig can contain four SiPMs with a hole in the middle, allowing the LED light to pass through and activate the SiPMs. An FPGA was utilized to control the LED and readout signals from the SiPMs. Good photon electron separation was achieved on this platform, similar as what has been achieved with the LED calibration, as shown in Fig. . SiPMs produced in the same batch share similarities, such as the working voltage, while SiPMs from different batches differ in these characteristics. There- fore, in every batch, a few of SiPMs were tested with the SiPM test platform to ensure their quality.

Assembly of sensitive layers The HBU boards were produced and soldered with SiPMs, SPIROC chips and other components. The scintillator tiles were assembled and secured onto the PCB using adhesive.

The HBUs along with scintillator tiles were secured in the steel cassette, as illustrated in Fig. . Prior to installing the

top steel sheet, an electronic test was conducted to verify the 317

basic functionality of this sensitive layer. The pedestals of all channels were checked. LED was activated group by group as to find out potential light crosstalk or dead channels.

TESTS OF THE AHCAL PROTOTYPE Integration of the prototype The supporting framework of the prototype was manufac- tured and then integrated with the steel absorbing plates, the gaps between the absorbers were tested to ensure the toler- ance for sensitive layers. The sensitive layers were inserted layer by layer. Several fans were fixed on the right side of the prototype for air cooling, as depicted in Fig. . The complete AHCAL prototype reaches a total weight of 5.5 tons.

In order to calibrate the pedestal and gain ratio of each AH-

CAL channel, an electronic test was conducted. Additionally, 331

a cosmic ray test was performed to validate the functionality of the entire prototype.

B. Electronic test 334

The electronic test was carried out using the calibration 335

system introduced in Section . The pedestals of both high gain channels and low gain channels were obtained through an external trigger. depicted the distributions of pedestals for all AHCAL high gain channels and low gain channels. sensitive layer.

Consistency within a chip and differences

among chips were observed, indicating that non-uniformities 343

among pedestals mainly originated from the variations among SPIROC chips.

The gain ratios and saturation points of all AHCAL chan- nels were calibrated by the charge injection. The distributions of gain ratios and saturation points were depicted in Fig. sensitive layers have similar gain ratio, except for the last two layers due to the different junction capacitance of NDL SiPMs. 11(d) illustrates the differences in saturation points between SPIROC chips, indicating that the saturation points of AHCAL channels are primarily determined by the SPIROC chips.

Cosmic ray test A cosmic ray test was performed on a dedicated test plat- form with 40 sensitive layers, as shown in Fig. . During the cosmic ray test, signals from the top and bottom sensitive lay- ers were directed to the TLU for coincidence measurement, with the DAQ board processing the data acquisition accord- ingly. The cosmic ray test spanned a month, during which half a million events were recorded. channels in a chip, showing noticeable dark noise. To sup- press this dark noise, a threshold of

100 ADC

was applied to each hit in the offline analysis, and track fitting was per- formed. The track fitting was conducted using hits that were

Number of Channels Pedestal(ADC) Number of Channels Pedestal(ADC) Pedestal(ADC) Channel ID

the only hit in their respective layers. A minimum of 15 such 369

hits was required in each event. poorly fitted events with high chi-square values were ex- cluded, resulting in approximately 20,000 events displaying good tracking. In these events, noise hits were effectively eliminated by rejecting hits that were more than 120 mm away from the fitted track. noise hit rejection. The MIP peak was fitted using a con- volution of Gaussian and Landau functions. After pedestal extraction, the MPV obtained from the fitting was 347 ADC, roughly corresponding to 17 photon electrons according to the LED calibration results.

It is important to note that the MPV varies from chip to chip due to the differences in SiPM voltages and SPIROC Number of Channels Number of Channels Gain Ratio Saturation Point(ADC) Saturation Point(ADC) Number of Channels Channel ID Gain Ratio Layer Results of gain ratio calibration for AHCAL channels: (a)gain ratio. (b)saturation point. (c) Gain ratios of all sensitive layers. The last two layers exhibited different behavior because they utilize NDL SiPMs. (d)Saturation points varied from chip to chip within the sensitive layer. chip configurations. These variations in MPV resulted in dif- ferences in detection efficiency between sensitive layers, as shown in Fig. . The majority of AHCAL sensitive layers demonstrated a detection efficiency of approximately 97%, with approximately 2% of undetected events attributed to dead areas between scintillator tiles. Layer 9 showed a lower efficiency due to improper configurations, which were subse- quently rectified during the beam test.

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Detection Efficiency Layer SUMMARY AND OUTLOOK Several studies have been conducted on key components

of the AHCAL prototype, including the sensitive units, the 395

electronics, and the mechanical structure. These studies opti- 396

mized the design of the AHCAL, thereby improving the per- formance of the AHCAL. A 40-layer AHCAL prototype with

12,960 channels was constructed. An electronic test and a 399

cosmic ray test were conducted to the prototype. Pedestal and internal gain of each AHCAL prototype channel were cali- brated with the electric test data. The results of the cosmic ray test indicated that the typical MIP response for the AH- CAL chip was approximately 17 photoelectrons, while the detection efficiency for cosmic rays in the sensitive layers was approximately 97%.

These results validated the proper func-

tioning of the prototype and confirmed its readiness for the 407

three beam tests conducted between 2022 and 2023. The test beam data of the AHCAL prototype is currently under analysis.

Preliminary results indicate that the AH- CAL prototype demonstrates excellent imaging capability, enabling detailed visualization of the intricate inner struc- ture of hadron showers. Additionally, its energy resolution reaches approximately (GeV) , which satisfies the require- ments of the CEPC experiment.

Further results will validate the feasibility of using the AHCAL as a hadron calorimeter for the CEPC experiment and will contribute to enhancements in the CEPC baseline detector design. Additionally, the test

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